Under the terms of the deal, NVIDIA is investing $3.5B in MediaTek by purchasing convertible bonds issued by the company. Meanwhile, on the technology side of matters, MediaTek will be adopting NVIDIA’s complete NVLink Fusion technology stack, the Fusion chiplet, NVLink-C2C, and NVIDIA’s new NVHBM memory protocol, in order to provide it to its own customers. The significance of this technology licensing is that, as MediaTek’s custom silicon business has grown, NVIDIA wants to make its IP readily available to MediaTek’s customers, particularly those working with MediaTek to develop their own XPU accelerator chips.

The most significant element of this technology offering is the NVLink Fusion chiplet, which NVIDIA has offered since last year. The fabric bridge chip allows chip designers to integrate NVLink support via a UCIe-attached chiplet that provides full-chip NVLink fabric support (while keeping the central components of NVLink as a black box to be integrated rather than licensing the IP itself). This is the critical part to enabling NVLink support on custom XPUs, and allowing those chips to plug into NVLink networks and NVIDIA’s rackscale hardware ecosystem.

Looks like Nvidia wants to make sure that even if hyperscalers go with custom silicon that it can still exist in an Nvidia rack platform. They have a similar platform inclusion with Marvell and Amazon. No Broadcom though. I wonder if AMD gets an invite. ;-)

https://www.digitimes.com/news/a20260831PD238.html

The platform bundles the technologies that surround a custom XPU: the NVLink Fusion Chiplet, which connects XPUs to Nvidia's NVLink scale-up fabric over photonic or electrical interconnects; NVLink-C2C, providing high-bandwidth links between XPUs, Nvidia Rosa CPUs and other compatible processors; and NVHBM, which integrates customized memory to raise bandwidth and efficiency while freeing silicon area for compute.

Under this arrangement, customers bring their XPU designs to MediaTek and tune connectivity, memory, packaging, performance and power to their workloads, while Nvidia and MediaTek carry the surrounding stack — including the MGX rack-scale architecture.

Also

https://www.trendforce.com/news/2026/09/01/news-nvidias-first-investment-in-a-taiwan-listed-firm-in-spotlight-what-the-mediatek-deal-means-for-the-ai-race/

https://x.com/sssjeffpu/status/2094601154076488068

The EuroHPC Joint Undertaking (EuroHPC JU) has signed a procurement contract with Bull to deliver LUMI-AI, a next-generation supercomputer at the CSC – IT Center for Science Ltd. data center in Kajaani, Finland. Powered by AMD Instinct™ MI430X GPUs and 6th Gen AMD EPYC™ 256-core processors, the system is expected to provide 10 times the AI capacity and nearly twice the high-performance computing (HPC) capability of the current LUMI supercomputer. Deployment is scheduled for the second half of 2027.

What’s Next? LUMI-AI is scheduled for deployment in the second half of 2027 at CSC’s new data center in the Renforsin Ranta business park in Kajaani. The contract is valued at 387.8 million euros, including acquisition, delivery, installation and maintenance, with funding shared equally by EuroHPC JU and the LUMI AI Factory consortium.

~$450M for the entire setup

...Lambda, with Nvidia itself holding the lease on the data center, according to people familiar with the deal. 

Lambda will use the data center Hut 8 is developing to plug in chips bought from Nvidia, which is also its investor. It is not clear how much Lambda will pay Nvidia to access the data-center space.

In July, Hut 8 disclosed that a “high-investment-grade company” signed 15-year leases for its entire 700-megawatt Texas campus, but didn’t name the tenant. Hut 8 did say that the $20 billion facility would be designed to support Nvidia chips. 

Supply chain sources indicate that Nova Lake, slated for release early next year, will utilize a combination of different process technologies, including Intel's 18A and TSMC's N2P. Razor Lake, on the other hand, may further incorporate N2X. N2X represents a high-performance extension of TSMC's N2 platform, targeting high-frequency CPUs, AI, and HPC applications. It shifts transistor technology from FinFET to nanosheets, increasing the precision required for thin-film deposition, etching, cleaning, and CMP planarization.

My guess is that the bLLC ones are done at TSMC as I think that's the more demanding part. But assuming that Intel has the 18A / P capacity to service all of their products in 2027, I think the non-bLLC ones are up for grabs between 18A and N2 for PTL and RZL depending on some trade-off between performance and margin. But if 18A capacity is an issue, then it makes sense to go to TSMC where you can.

My guess is that AMD will also do some sort of Zen 6+ or some sort of halo product on N2X as well. It'll be interesting to see how AMD launches that family and the timing gap with X3D given NVL.

https://www.reddit.com/r/amd_fundamentals/comments/1vu7qm3/intel_razor_lake_to_use_tsmcs_n2x_ed_later/

One tariff approach under consideration would dramatically expand the number of tech products subject to the duties, hitting not just chips but potentially many of the goods made with them, such as laptops, gaming consoles or the servers that fill data centers, the people said. Commerce Secretary Howard Lutnick favors a structure that would tie foreign companies’ relief from the tariffs to investment in U.S. chip manufacturing to juice more domestic production, said four of the people.

The administration is also mulling a phase-in period for the new tariffs, the four people said. The people stressed that the framework could still be substantially revised in the coming weeks or months.

...

The lobbyists argue that the tariffs would slow the data center expansion by making it harder for U.S. companies to obtain the volume of semiconductors that the AI boom requires. The duties would hit just as American tech giants are on a record-setting AI spending blitz, dumping hundreds of billions of dollars into data center mega-campuses and snatching up the pricey, cutting-edge chips needed to operate them.

“This may be the single dumbest way imaginable to pursue American dominance in AI,” said one tech official from a major industry group that also served in the first Trump administration. “It’s like kneecapping yourself at the starting line.”

In the first few weeks of the program, Nvidia rankled some of its potential partners with the extent of control it sought, some of the people familiar with the matter said. Nvidia told some providers that they could rent the chips only to approved customers. Nvidia also indicated that it preferred the capacity to be distributed among several smaller AI companies rather than leased to a single large customer, the people said. Some cloud providers resisted, arguing that they should be free to select their own customers.

Nvidia disclosed the scale of the program for the first time in its quarterly filing this week. The company said it had made $36 billion of commitments under agreements that typically lasted six years, but noted that as cloud providers sold capacity to other customers, that commitment would decrease.

“The new business model we introduced in July that opens up compute access to the fast-growing AI ecosystem is still in place and continues to evolve due to high demand,” an Nvidia spokeswoman said.

Some questionable reporting going on with the supposed MS estimates of AMD vs Nvidia CoWoS in 2027. I'm going to note the MS quotes and skip all the meta / meta^2+ commentary.

https://x.com/MikeLongTerm/status/2091532117310070943

“Based on our CoWoS consumption forecasts, Nvidia’s 5nm Vera CPU could grow to 5.75mn units in 2027, while AMD’s 2nm Venice CPU may reach 6.75mn units in 2027 vs. ~1.25mn in 2026.”

I thought was pretty frisky with an implied 5.5M Venice units making up ~33% of units sold for all of 27FY. It took about 12 months from launch for Turin to be almost 50% of sales for around the fourth quarter after launch and that was off of a relatively small base. I think that Venice will ramp at least as fast as Turin, but it also has Turin's quick ramp as a baseline.

https://x.com/pequityresearch/status/2092065676101857423

Morgan Stanley: Nvidia's CoWoS allocation to drop from an estimated 53.4% in 2026, to 45.6% in 2027. Largest percentage increase going to AMD from 9.4% to 19.8%.

But I suppose where I and MS are aligned is that AMD is taking a big fucking swing on N2. I expect the "AMD doesn't have supply flexibility because it doesn't have fabs" (which apparently only affects AMD) to be put to rest by the 27Q2 / 27Q3.

Versal Premium Gen2 matters because AMD is positioning one adaptive SoC family across physical AI, data center, and mission-critical systems while pushing security and memory onto the package. This EPYC pairing and CXL story give the platform an x86 path that competing adaptive parts lack. I have to say, the more that we use AI models for programming, the possibility to use FPGAs by a larger audience feels like it should be a key message in these kinds of presentations.

OpenAI’s Jalapeño chip, which it claims is better than Nvidia’s Blackwell chips at AI inference, is good in part because its Sol and Astra models helped with the design and software process.

And Google’s tensor processing unit team credited its DeepMind researchers for using AI to help make TPU v8, its latest chips, 6% more power efficient and also 6% more powerful.

Nvidia of course has also leaned into AI-driven chip design, with an array of software libraries that apply AI to everything from the stencil layout for how circuits are lasered onto a chip to how data moves between the millions of microscopic parts of a chip.

Design startup Agentrys, which on Wednesday announced it has raised $25 million, aims to help chip designers use AI agents to automate the process and teach chip designs to improve themselves...the best-known of the group is Ricursive, which notched a $4 billion valuation in February.

A company that previously needed 100 or more engineers to design a particular chip can now, thanks to AI, design a chip with similar capabilities with just 30 to 40 people or twice as fast, he said.

Presumably Anthropic is doing something similar. AI lends itself really well to things with a lot of structure and defined outputs. Just like most things involving AI, it's a race to functional scale. Tokenmaxxing itself is inherently stupid, but aggressive, thoughtful R&D, a tight feedback loop, and rebuilding your knowledge process is smart could separate the winners from the losers pretty fast.

As a lot of knowledge work gets amplified or replaced by AI, there could be some big shifts in the pecking order of a lot of knowledge-based companies, especially for companies and people whose main value was based on sitting on a lot of it either in direct form or applied functionality. The time to scale knowledge or applied representations of it will shrink considerably. Knowledge-based moats like software, patents, IP, etc. might not go away, but they are starting to narrow.

Keep in mind Palantir's Karp's warning:

https://x.com/PalantirTech/status/2072114267776491695?lang=en

1. Controlling your weights is controlling your fate. Weights are the distilled form of hard-won, accumulated institutional knowledge. If you let others control your weights, you are allowing them to migrate the alpha of your business to theirs.

2. There is no contradiction between sovereignty and alpha. The architecture that maximally preserves sovereignty is one that enables institutions to own their tribal knowledge, and to compound it as alpha.

I'm curious if frontier labs will move beyond just token pricing into something like a revenue share across industries. Lower floor but much higher ceiling.

Nvidia has agreed to buy Hugging Face, a company known for its GitHub-like repository of open-source AI models, for $12.9 billion, according to a person with knowledge of the agreement.

The move will put Nvidia in charge of a strategic asset in the race among open-source model developers to catch up to closed-source AI models from Anthropic and OpenAI. Nvidia leaders believe that a plethora of successful open models will help preserve its AI hardware dominance because they will be a counterweight to the closed-source AI developers, each of which is trying to develop competing AI server chips and lessen their reliance on Nvidia’s.

...

Besides storing models, Hugging Face helps AI app developers find and download audio, visual and text-based AI models and optimize them to run on different server chips. It also offers cloud services to power the models in AI applications.

Chairman D.K. Tsai said an initial FOPLP pilot line representing about NT$20 billion (approx. US$625 million) in investment is expected to reach breakeven in 2027. Monthly capacity is projected to rise to 5,000 panels in 2028. Tsai said the company expects no shortage of customers through 2030.

Powertech(6239.TW) has already joined AMD's AI chip supply chain, with FOPLP production scheduled to ramp in 2027...Powertech's approach places silicon bridge dies within a square-panel process and uses RDL interconnects at roughly the 2-micron level to connect SoCs, ASICs, HBM and chiplets with different I/O pitches. The platform supports Chip-First, Chip-Last and the more technically demanding Chip-Middle configurations.

“Autonomous driving requires massive processing capabilities to rapidly handle enormous amounts of sensor data while supporting increasingly sophisticated AI workloads,” said Don Burnette, Founder & CEO of Kodiak. “AMD EPYC CPUs are the best in the business, delivering the performance, scalability, and efficiency we need to continue advancing the Kodiak Driver and bringing autonomous trucking to commercial scale.”

Autonomous trucks demand exceptional CPU performance, requiring high core frequency (or clock speed) and enough PCIe lanes to process massive volumes of data at fast rates. AMD EPYC processors provide the Kodiak platform with 80 PCIe lanes and high core frequency – 3.15 GHz for base frequency with a max boost frequency of up to 4.4 GHz - delivering 25% higher clock speeds than the previous generation device. These hardware features enable Kodiak trucks to process heavy data loads more quickly and support increasingly sophisticated AI workloads for assessing surroundings and reacting in real-time. AMD EPYC CPUs handle path planning, localization, logistics, and timing-sensitive general-purpose processing to determine vehicle navigation. Large amounts of sensor data from cameras, LiDARs, and radars within Kodiak’s proprietary SensorPods are aggregated in the EPYC processor to be used for preprocessing and path-planning.

Went public via SPAC in September 2025.

https://finance.yahoo.com/quote/KDK/

“We extend our AI factory framework to the server CPU market and forecast revenue growing at a 44% five-year CAGR to ~$201B in CY30, driven by conventional datacenter demand, CPUs that host and coordinate accelerators, and CPUs supporting agentic workloads,” Raymond James analyst Simon Leopold wrote in a note to clients. “We upgrade AMD to Strong Buy from Outperform, extend our through CY28, and update estimates for Arm, Intel and Nvidia. Our forecast is broadly consistent with Nvidia's $200B long-term framework and below AMD's $220B estimate, which our model can reach under a more aggressive scenario tied to AMD's ~$1.4T accelerator TAM and higher agent adoption, concurrency and tool usage.”

So, he's using Nvidia's number as the mid point and AMD's as the high end.

Nvidia Rubin Ultra will ship with 192GB of HBM4 8-hi. Not only is this a huge downgrade from the original Rubin Ultra which was previewed with 1TB of HBM, but it is even lower than regular Rubin which has 288GB...The number of cubes got cut to 8 when 4 die Rubin Ultra was scrapped. Then the stack height got reduce to 8-hi instead of 16-hi. Last it is cut to HBM4 which uses 24Gb dies instead of 32Gb dies with HBM4E, although an 8-hi HBM4E upgrade could com later.

I think it's just

https://www.reddit.com/r/amd_fundamentals/comments/1s8fwxb/jukan05_rumor_the_4die_rubin_ultra_has_been/

+

https://www.reddit.com/r/amd_fundamentals/comments/1qaml2w/comment/nz44xcl

+

https://www.reddit.com/r/amd_fundamentals/comments/1vibow9/nvidia_weighs_radical_idea_less_rubin_ultra_chip/

My impression is that The AMD Way if you're a distant second is to take the most product risk that doesn't jeopardize your customers' roadmap, deliversvalue within a critical mass of scope, and just relentlessly compound that generation after generation growth and wait for your opponent to overreach.

But within the product, although chiplets are there for modularity, economics, and yield reasons, I also don't think that AMD wants to take a lot of risk, especially on the manufacturing side, on the units of work because of having a bunch of units. But they focus hard on the connective tissue to minimize the cost of the disaggregation for their aggregate compute throughput approach.

https://ir.amd.com/news-events/press-releases/detail/767/amd-unveils-expanding-set-of-high-performance-products-and-technologies-propelling-next-phase-of-growth

“Infinity Fabric is the secret sauce within each of our products that allows us to bring together our leadership x86 CPUs and graphics in an efficient way to deliver breakthrough products to meet the needs of the most demanding workloads.”

https://www.reddit.com/r/amd_fundamentals/comments/1qrobsy/mark_papermaster_amd_cto_ian_interviews_47/

But the biggest thing that we did right was the investment, even before we started the Zen core, in what became publicly our Infinity Fabric. It’s our network-on-chip link technology, and it was game-changing for AMD. You could build the best CPU and GPU, but if you can’t connect them seamlessly so they can scale and you don’t create bottlenecks, it doesn’t matter.

My impression is that Intel is more likely to talk about their chips more before they launch at Hot Chips, and AMD is more likely to talk about them after they launch (which makes for the more boring presentation).

Intel has already started lowering expectations between Tan struggling to not flog DMR in public about not having SMT or Zinsner saying at the BoA conference in June 2026:

I think Granite is certainly better than prior retention core will definitely be better than prior products. And Diamond, in its swim lane, not counting the SMT, will be better than Granite.

So we'll make steady improvement. I think we have a really good road map. We brought in a new person from the outside, what was it like 6 months ago or something like that, Kevork. He's doing a good job like tearing things down and making sure that we're back to executing at a high level. It helps that we have leveraged our own nodes in that area. And now those nodes are becoming more performing to 18As, what they call PPA price. Our power performance area is much better than Intel 3\. So as we kind of migrate our process nodes, we should see continually better performance.

To me that sounds like:

1. Our process that led to our current server products was not good (new person, tearing things down, back to executing at a high level, etc)
2. DMR needs a very sculpted environment to look good.
3. 18A/P being better than Intel 3 isn't the comparison so much as 18A/P vs TSMC N2.

Conversely, AMD positions Venice as the best all around CPU period.

Still, I expect for DMR to materially narrow the gap of Turin vs. GNR with some workloads where it will shine. But I still expect it to be 10%+ 15%+ broadly less performant. I think the performance per watt will be even worse.

(edit: given how AMD is taking a more family approach with Venice, this probably isn't the right way to look at it as you'd compare the most appropriate benchmarks for a certain SKU.)

I think the ramp will be in earnest at the start of 2028. Being worse and late would normally be terrible, but in this server environment, it could still sell well although trying to bring Coral Rapids up puts buyers in a weird spot. But Venice will put a ceiling on what DMR can charge.

On a side note, despite all these specs in the deck, they don't mention going to ST (instead talks about thread performance). The SMT to ST back to SMT flip flop puts them in an awkward position because it's not easy to sing the praises of one and then somebody asking you why did you go away from / go to it in the first place.

I think that I forgot to post this.

TSMC (2330) has another piece of good news for its advanced process technology. Supply chain sources indicate that with major customers such as Nvidia, AMD, and Broadcom actively placing orders, TSMC's original target of 180,000 wafers per month for 3nm by the end of this year is expected to be achieved ahead of schedule in the early fourth quarter. At the same time, orders for 2nm are also booming, and it is expected to approach 100,000 wafers per month by the end of this year as scheduled.

...

The market originally expected TSMC's monthly 3nm wafer starts to reach 180,000 wafers by the end of this year. It is understood that due to continuous orders from customers, TSMC's monthly 3nm wafer starts in the first half of the year have already approached 150,000 wafers, and the monthly wafer starts are expected to reach 180,000 wafers by the beginning of the fourth quarter, reaching the market's expected target two to three months ahead of schedule.

...

Regarding 2nm, the supply chain revealed that TSMC's monthly wafer starts in the first half of the year reached 50,000 to 60,000 wafers, and it is expected that by the beginning of the fourth quarter, the monthly wafer starts will exceed 80,000 wafers, and move towards 100,000 wafers per month by the end of the year, which is in line with industry expectations.

In other words, at the beginning of the fourth quarter, TSMC's monthly wafer starts for 2/3 nanometer wafers will exceed 260,000, becoming the main driver of the company's continued revenue growth this year.

AMD is likely the second largest customer on N2 after Apple. AMD says that they're either the third or 4th customer depending on the month (the other likely being Broadcomm?). So, AMD should be laying claim to a decent amount of N3 as well.

If AMD gets 20% of N2 wafers (20K) and say 10% of the N3 (18K), that's 38K WPM that are competitive or better vs 18A. Intel 18A probably ends 2026 at ~40K WPM? And then you toss in parametric yield, resulting compute density per wafer, gross margin per wafer, etc., I don't see AMD as the one that has a lot less supply flexibility going into 2027. But hey let's see.

Actual review: https://www.notebookcheck.net/This-laptop-with-64-GB-RAM-is-perfect-for-AI-agents-HP-ZBook-8-G2a-14-review.1350756.0.html

In 2025, we had the battle of Intel Lunar Lake and Arrow Lake versus AMD Krackan Point and Strix Point. And in 2026, it is Intel Panther Lake versus AMD Gorgon Point. In both cases, AMD does well, with strong CPU performance, despite Gorgon Point being merely a refresh of the earlier chips with the same Zen5 CPU cores.

However, there is one weak-point: GPUs. Intel has massively upped its iGPU game, with the Panther Lake Core Ultra X7 and X9 chips and the ARC B390 iGPU. Meanwhile, on the AMD-side, there is a stand-still, RNDA 3+ still has to hang on.

For the most part, this is fine: In the low end, AMD Radeon solutions like the AMD Radeon 860M can still compete with the basic Intel Panther Lake iGPUs. And Intel does not even have a competitor for Strix Halo in terms of GPU performance, even Panther Lake can not compete.

However, AMD has a weak-point, namely the mid-range segment, the former Strix Point territory. A laptops we recently reviewed that demonstrates this is the HP ZBook 8 G2a 14. This entry-level workstation laptops features the AMD Ryzen 9 HX 470, a strong CPU in its own right that compares well against Intel Panther Lake. However, it is paired with the AMD Radeon 890M - by now a pretty weak iGPU solution that launched in 2024, which is not even close to comparing with the ARC iGPU solutions. Our benchmarks show this: The ARC B390 is around 65 percent faster, and it is featured in competing laptops to the ZBook 8 G2a 14 - even in HP's own ZBook 8 G2i 14, the Intel variant.

It would be annoying that a strong iGPU became important after AMD got lapped as an iGPU while waiting to re-platform around RDNA 5. But the importance of something can change once you pass some minimum threshold too.

In the second quarter of 2026, global server shipments were below prior expectations, growing 3.8% quarter-over-quarter. The main reason was tight supply of key components such as memory, CPU, and IC substrate, which curbed overall system shipment momentum. Even so, procurement by large US cloud service providers still grew 11.6% quarter-over-quarter, and the development of agentic AI applications has shifted cloud service providers' compute deployments away from accelerator-led AI servers toward more CPU-centric servers for compute and storage. Shipments by branded vendors also declined 5.6%.

In addition to tighter supply constraints affecting larger cloud service providers, general enterprises were less willing to accept increases in server prices, causing shipments to fall short of expectations.

DigiTimes is talking about server shipments (presumably including ARM) and the x86ers are talking more about CPU sales. The commentary does Intel's 26Q2 commentary better which I suppose makes sense since Intel still has makes up 2X the units of AMD for x86 server share and is a better proxy for volume.

Intel has the bigger supply problem in the short-term. Although its ASPs were naturally increasing with core count mix and cost pass-throughs, it also had its discretionary / demand-based price increases on its legacy / captive crowd (presumably more enterprise.) AMD was eschewing the more demand-based pricing to go for units. AMD's 26Q2 enterprise sales grew about as much as is cloud which given the above implies a material jump in enterprise unit share. The pushback on price increases is likely the demand-based increases from Intel which if Intel oversteps will make enterprise penetration easier as those pools come up for grabs.

Looking into the third quarter of 2026, global server shipments are expected to surpass 5 million units for the first time, up 2.8% quarter-over-quarter. While growth will continue, supply shortages will weigh on the pace, and the growth rate will slow from the prior quarter. In particular, procurement by large US cloud service providers will rise only 1.7% quarter-over-quarter, a clear deceleration. Branded vendors should rebound, with combined shipments from Dell, Supermicro, and Hewlett Packard Enterprise (HPE) expected to grow 5.8% quarter-over-quarter.

AMD guided for 26Q3 and 26Q4 EPYC revenue to be 80%+ up YOY. AMD's QOQ unit growth should be much larger than 2.8%. Intel, however, guided for a flattish 26Q3 overall since it's supply-constrained. Supposedly things pick up near the end of 26Q3 and carries into 26Q4.

I'm guessing that AMD gets less of a unit share gain for 26Q3 while revenue share might be flat to a little down. 26Q4 the unit share gain might be flat to a bit down with more of a loss in revenue share when its 26Q4 supply bump is there for the whole quarter. And then once Venice kicks in, I expect to see gains in both throughout 2027 until AMD hits 50% revenue somewhere around mid-year.

SpaceXAI plans to expand its AI infrastructure behind Grok on NVIDIA Vera Rubin, while extending an optimized Vera Rubin NVL72 into space with its first-generation Starmind satellite.

“Agentic AI requires a new kind of computing system — one built not only to generate answers, but to take action,” said Ian Buck, vice president of hyperscale and high-performance computing at NVIDIA. “Vera gives AI agents the CPU performance to act in real time — executing code, processing data and coordinating complex tasks. SpaceXAI is taking this architecture from massive AI factories to the next frontier of computing in orbit.”

“Vera gives us the CPU performance and memory bandwidth to run enormous amounts of orchestration, code and data processing while keeping GPUs doing what they do best,” said Mike Nicolls, president of SpaceXAI. “That means higher-performance AI agents and more useful work from every watt of compute.”