The EuroHPC Joint Undertaking (EuroHPC JU) has signed a procurement contract with Bull to deliver LUMI-AI, a next-generation supercomputer at the CSC – IT Center for Science Ltd. data center in Kajaani, Finland. Powered by AMD Instinct™ MI430X GPUs and 6th Gen AMD EPYC™ 256-core processors, the system is expected to provide 10 times the AI capacity and nearly twice the high-performance computing (HPC) capability of the current LUMI supercomputer. Deployment is scheduled for the second half of 2027.

What’s Next? LUMI-AI is scheduled for deployment in the second half of 2027 at CSC’s new data center in the Renforsin Ranta business park in Kajaani. The contract is valued at 387.8 million euros, including acquisition, delivery, installation and maintenance, with funding shared equally by EuroHPC JU and the LUMI AI Factory consortium.

~$450M for the entire setup

Under the terms of the deal, NVIDIA is investing $3.5B in MediaTek by purchasing convertible bonds issued by the company. Meanwhile, on the technology side of matters, MediaTek will be adopting NVIDIA’s complete NVLink Fusion technology stack, the Fusion chiplet, NVLink-C2C, and NVIDIA’s new NVHBM memory protocol, in order to provide it to its own customers. The significance of this technology licensing is that, as MediaTek’s custom silicon business has grown, NVIDIA wants to make its IP readily available to MediaTek’s customers, particularly those working with MediaTek to develop their own XPU accelerator chips.

The most significant element of this technology offering is the NVLink Fusion chiplet, which NVIDIA has offered since last year. The fabric bridge chip allows chip designers to integrate NVLink support via a UCIe-attached chiplet that provides full-chip NVLink fabric support (while keeping the central components of NVLink as a black box to be integrated rather than licensing the IP itself). This is the critical part to enabling NVLink support on custom XPUs, and allowing those chips to plug into NVLink networks and NVIDIA’s rackscale hardware ecosystem.

Looks like Nvidia wants to make sure that even if hyperscalers go with custom silicon that it can still exist in an Nvidia rack platform. They have a similar platform inclusion with Marvell and Amazon. No Broadcom though. I wonder if AMD gets an invite. ;-)

https://www.digitimes.com/news/a20260831PD238.html

The platform bundles the technologies that surround a custom XPU: the NVLink Fusion Chiplet, which connects XPUs to Nvidia's NVLink scale-up fabric over photonic or electrical interconnects; NVLink-C2C, providing high-bandwidth links between XPUs, Nvidia Rosa CPUs and other compatible processors; and NVHBM, which integrates customized memory to raise bandwidth and efficiency while freeing silicon area for compute.

Under this arrangement, customers bring their XPU designs to MediaTek and tune connectivity, memory, packaging, performance and power to their workloads, while Nvidia and MediaTek carry the surrounding stack — including the MGX rack-scale architecture.

Also

https://www.trendforce.com/news/2026/09/01/news-nvidias-first-investment-in-a-taiwan-listed-firm-in-spotlight-what-the-mediatek-deal-means-for-the-ai-race/

https://x.com/sssjeffpu/status/2094601154076488068

...Lambda, with Nvidia itself holding the lease on the data center, according to people familiar with the deal. 

Lambda will use the data center Hut 8 is developing to plug in chips bought from Nvidia, which is also its investor. It is not clear how much Lambda will pay Nvidia to access the data-center space.

In July, Hut 8 disclosed that a “high-investment-grade company” signed 15-year leases for its entire 700-megawatt Texas campus, but didn’t name the tenant. Hut 8 did say that the $20 billion facility would be designed to support Nvidia chips. 

Supply chain sources indicate that Nova Lake, slated for release early next year, will utilize a combination of different process technologies, including Intel's 18A and TSMC's N2P. Razor Lake, on the other hand, may further incorporate N2X. N2X represents a high-performance extension of TSMC's N2 platform, targeting high-frequency CPUs, AI, and HPC applications. It shifts transistor technology from FinFET to nanosheets, increasing the precision required for thin-film deposition, etching, cleaning, and CMP planarization.

My guess is that the bLLC ones are done at TSMC as I think that's the more demanding part. But assuming that Intel has the 18A / P capacity to service all of their products in 2027, I think the non-bLLC ones are up for grabs between 18A and N2 for PTL and RZL depending on some trade-off between performance and margin. But if 18A capacity is an issue, then it makes sense to go to TSMC where you can.

My guess is that AMD will also do some sort of Zen 6+ or some sort of halo product on N2X as well. It'll be interesting to see how AMD launches that family and the timing gap with X3D given NVL.

https://www.reddit.com/r/amd_fundamentals/comments/1vu7qm3/intel_razor_lake_to_use_tsmcs_n2x_ed_later/